|
СТ |
Implementation of the PIPE Processor |
1990 |
Farrens M., Pleszkun A. |
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|
|
Computer |
03.08.1991 |
|
СТ |
Modifying VM Hardware to Reduce Address Pin Requirements |
1992 |
Farrens M., Park A., Tyson G. |
|
|
|
SIGMICRO Newsletter |
13.03.1993 |
|
СТ |
MISC: A Multiple Instruction Stream Computer |
1992 |
Tyson G., Farrens M., Pleszkun A. R. |
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|
|
SIGMICRO Newsletter |
13.03.1993 |
|
СТ |
Techniques for Extracting Instruction Level Parallelism on MIMD Architectures |
1993 |
Tyson G., Farrens M. |
|
|
|
SIGMICRO Newsletter |
18.03.1994 |
|
СТ |
A Study of Single-Chip Processor/Cache Organizations for Large Numbers of Transistors |
1994 |
Farrens M., Tyson G., Pleszkun A. R. |
|
|
|
Computer Architecture News |
20.06.1994 |
