Вы здесь

Главная

кэш

Связанные издания:

Cross-Loop Reuse Analysis and Its Application to Cache Optimizations
Data Distribution and Loop Parallelization for Shared-Memory Multiprocessors
Decoupled Sectored Caches: Conciliating Low Tag Implementation Cost and Low Miss Ratio
Distributed File Caching in Parallel Architectures Utilizing High Speed Networks
Effects of Multithreading on Cache Performance
Efficient On-the-fly Analysis of Program Behavior and Static Cache Simulation
Efficient Procedure Mapping using Cache Line Coloring
Efficient Software Data Prefetching for a Loop with Large Arrays
Eliminating Invalidation in Coherent-Cache Parallel Graph Reduction
Eliminating the Address Translation Bottleneck for Physical Address Cache
Etude Comparative des Architectures des Microprocesseurs Intel Pentium et PowerPC 601
Evaluating Performance of Prefetching Second Level Caches
Evaluating Stream Buffers as a Secondary Cache Replacement
Evaluating the Memory Overhead Required for COMA Architectures
Excel-NUMA: Toward Programmability, Simplicity, and High Performance
Executing Compressed Programs on An Embedded RISC Architecture
Expected I-Cache Miss Rates via the Gap Model
Exploiting Parallelism in Cache Coherency Protocol Engines
Exploiting the Benefits of Multiple-Path Network in DSM Systems: Architectural Alternatives and Performance Evaluation
Exploring the Design Space for a Shared-Cache Multiprocessor
Fast and Efficient Cache Behaviour Prediction
Fast Instruction Cache Performance Evaluatuin Using Compile-Time Analysis
Functional Implementation Techniques for CPU Cache Memories
Global Cache Management for Multi-class Workloads in Data Warehouses
Hardware Support for Flexible Distributed Shared Memory
Hierarchical, Adaptive Cache Consistency in a Page Server OODBMS
Improved Multitheading Techniques for Hiding Communication Latency in Multiprocessor
Improved Traditional Mirror
Improving Cache Locality by a Combination of Loop and Data Transformations
Improving Cache Performance with Balanced Tag and Data Paths
Improving Locality in the ADAM Multithreaded Architecture
Improving the Cache Locality of Memory Allocation
Information Extraction and Database Techniques: A User-Oriented Approach to Querying the Web
Instruction Scheduling for the Motorola 88110
Interprocedural Array Data-Flow Analysis for Cache Coherence
IO-Lite: A Unified I/O Buffering and Caching System
Lazy Caching
Limitations of Cache Prefetching on a Bus-Based Multiprocessor
Limited Preemptible Scheduling to Embrace Cache Memory in Real-Time Systems
Locality and False Sharing in Coherent-Cache Parallel Graph Reduction
Maintaining Strong Cache Consistency in the World Wide Web
Mechanisms for Cooperative Shared Memory
Memory Assignment for Multiprocessor Caches through Grey Coloring
Memory Latency Effects in Decoupled Architectures with a Single Data Memory Module
Modeling a Distributed Cached Store for Garbage Collection: The Algorithm and Its Correctness Proof
Modeling Cache Coherence Overhead with Geometric Objects
Object-Oriented Architectural Support for a Java Processor
On Predicting Data Cache Behavior for Real-Time Systems
Optimal Allocation of On-chip Memory for Multiple-API Operating Systems
Optimizing Method Search with Lookup Caches and Incremental Coloring