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Связанные издания:
An Investigation of the Performance of Various Dynamic Scheduling Techniques
Exploting Instruction-Level Parallelism with the Conjugate Register File Scheme
High Performance Embedded Architectures and Compilers: Proc./Second International Conference, HiPEAC 2007. Ghent,Belgiun,January 2007
MICRO-25: Proc./The 25th Annual Intern. Symp. on Microarchitecture, Dec.1-4, 1992, Portland, Oregon, USA
MICRO-26: Proc. of the 26th Annual Intern. Symp. on Microarchitecture. December 1-3, 1993. Austin, Texas
Microarchitecture Support for Dynamic Scheduling of Acyclic Task Graphs
Power-Aware Computer Systems: Revised Papers/Third International Workshop, PACS 2003. San Diego, CA, USA, December 2003
Power-Aware Computer Systems: Revised Selected Papers/4th International Workshop, PACS 2004. Protland, OR, USA, December 2004
The 16-Fold Way: A Microparallel Taxonomy