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Связанные издания:
Achieving optimality for gate matrix layout and PLA folding: a graph theoretic approach
Achieving Optimality for Gate Matrix Layout and PLA Folding: A Graph Theoretic Approach
A Digit-Serial Divider for Fine Grain Heterogeneous Parallel-Pipelined Processing
A Real-Time Systolic Algorithm for on-the-fly Hidden Surface Removal
A spy of parallel neural networks
Code Genration in Automatic Parallelizers
Decomposing Hierarchical Cayley Graphs, with Applications to Information Dissemination and Algorithm Design
Extending C++ with Communicating Sequential Processes
Factoring and Scaling Kautz Digraphs
Implementation of a VLSI Polynominal Evaluator for Real-Time Applications
Laboratoire de l Informatique du Parallelisme
LAIOS: A parallel execution of PROLOG by data copies
Lecture Notes on Parallel Languages and Algorithms
Linear Systolic Arrays for Matrix Multiplication: Comparison of Existing Synthesis Methods and New Results
Multiscattering on a reconfigurable network of processors
New Redundant Representations of Complex Numbers and Vectors
On the limits of multipass grammars
On the Line-Directionality of Some Orders
Parallel Fractional Cascading on Hypercube Multiprocessors
Regular Partitioning for Synthesizing Fixed-Size Systolic Arrays
Space-Time Transformation of While-Loops using Speculative Execution
Transitive closure in parallel on a linear network of processors
Uniform but non local DAGs: a trade-off between pure systolic and SIMD solutions
Z-Buffer on a transputer-based machine