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Связанные издания:
50 советов по работе с текстовыми процессорами
A 32-bit LISP Processor for the AI Workstation ELIS with a Multiple Programming Paragigm Language, TAO
A 400 MFLOPS FFT Processor VLSI Architecture
Abstraction Techniques for Modeling Real-World Interface Chips
Accelerator Programming Using Directives: Proc./5th International Workshop, WACCPD 2018, Dallas,TX.USA, November 2018
Access and Alignment of Data
A Comparison of some Parallel Fortran Dialects
A Comprehensive Instruction Fetch Mechanism for a Processor Supporting Speculative Execution
A Denotational Real-Time Semantics for Shared Processors
Advanced Parallel Processing Technologies: Proc./12th International Symposium, APPT 2017, Santiago de Compostela, Spain, August 2017
AFADA, A Measurement Tool for Ada
Affine Timings for Systems of Affine Recurrence Equations
A Fine-Grain Parallelizing Compiler
A Hardware Architecture Design Methodology for Hidden Markov Model Based Recognition Systems Using Parallel Processing
A Message-Pool-Based Parallel Operating System for the Kyushu University Reconfigurable Parallel Processor - Parallel Creation of Multiple Threads
A Minimalist Approach to the Development of a Word Processor Supporting Group Writing Activities
A Model for Performance Estimation in a Multistreamed Superscalar Processor
Analysis of Or-Parallel Execution Models
An Architectural Model for a Flat Concurrent Prolog Processor
An efficient associative algorithm for multi-comparand parallel searching and its applications
An Elementary Processor Architecture with Simultaneous Instruction Issuing from Multiple Theards
An Executable Language Definition
An Integer Linear Programming Model of Software Pipelining for the MIPS R8000 Processor
An Interactive Graphic CAD Tool for the Synthesis and Analysis of VLSI Systolic Structures
An Introduction to LATEX
An Introduction to the Beetle Forth Virtual Processor
An Object-Oriented Framework for the Formal Verification of Processors
An Optical Content-Addresable Parallel Processor for Fast Searching and Retrieving
A Note on Lower Bound for One-Dimensional Systolic Array
An Out-of-Order Superscalar Processor with Speculative Execution and Fast, Precise Interrupts
A Novel Cache Design for Vector Processing
AP 527: An Oracle SQL- APL2/PC Auxiliary Processor
A parallel algorithm for two processors precedence constraint scheduling
A Performance Evaluation of Several Priority Policies for Parallel Processing Systems
A Performance Study of Instruction Cache Prefetching Methods
A Processors Management System for PVM
Architecture of a Floating-Point Butterfly Execution Unit in a 400-MFLOPS Processor VLSI and Its Implementation
Architecture of Computing Systems - ARCS 2019: Proc./32nd International Conference, Copenhagen, Denmark, May 2019
A RISC Based Protocol Converter, Printer Emulator for IBM 3270 Environment
A RISC Processor Architecture with a Versatile Stack System
Arithmetic of Finite Fields: Proc./Third International Workshop, WAIFI 2010, Istanbul, Turkey, June 2010
A Scalable Implementation of Barrier Synchronization Using an Adaptive Combining Tree
A Scalable Performance Prediction Method for Parallel Neural Network Simulations
A Special Purpose Architecture for Real-Time SAR Data Processing
Assoziative Prozessoren
A String Search Processor LSI
Asynchronous Polycyclic Architecture
A theorem proving associative processor
A Tightly-Coupled Processor-Network Interface
A Trace Cache Microarchitecture and Evaluation
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