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Связанные издания:

High Performance Computing: Proc./34th International Conference, ISC High Performance 2019, Frankfurt/Main, Grmany, June 2019
High Performance Computing: Proc./35th International Conference, ISC High Performance 2020, Frankfurt/Main, Germany, June 2020
High Performance Computing: Revised Selected Papers/ISC High Performance 2018 International Workshops, Frankfurt/Main, Germany, June 2018
High Performance Embedded Architectures and Compilers: Proc./5th International Conference, HiPEAC 2010, Pisa, Italy, January 2010
Hoisting Branch Conditions - Improving Super-Scalar Processor Performance
Implementation of High-Accuracy Computations in Vertical Processing Systems
Implementation of the PIPE Processor
Improving on the Best: "Like a 1A, Only Better"
Improving Semi-Static Branch Prediction by Code Replication
Increasing the Number of Strides for Conflict-Free Vector Access
Instruction Architecture for a High Performance Integrated Prolog Processor IPP
Instruction Scheduling for Complex Pipelines
Instruction Scheduling for the Motorola 88110
Integrated Circuit and System Design: Power Timing Modeling, Optimization and Simulation: Proc./ 15th International Workshop, PATMOS 2005. Leuven, Belgium, September 2005
Integrated Processor Scheduling for Meltimedia
Interaction with a limited object domain - ZAPSIB Project
Interleaved Parallel Schemes:Improving Memory Throghtput on Supercomputers
Investigation of Associative Search Algorithms in Vertical Processing Systems
Kronos: Processor Family for High-Level Languages
Language Star for Associative and Parallel Computation with Vertical Data Processing
Linguistische processoren des Systems ZAPSIB
Locality Optimizations for Parallel Machines
LogP: Towards a Realistic Model of Parallel Computation
Loop-Level Process Control: An Effective Processor Allocation Policy for Multiprogrammed Shared-Memory Multiprocessors
Machine Translation: From Real Users to Research: Proc./6th Conference of the Association for Machine Translation in the Americas, AMTA 2004. Washington, DC, USA, September/October 2004
Mapping Parallel Computations to a Heterogeneous Architecture
Mapping uniform recurrences onto small size arrays
Massively Multi-Agent Systems II: Revised Selected Papers/ International Workshop, MMAS 2018, Stockholm, Sweden, July 2019
Microsoft Works 4.0 для Windows 95
MIDEE: Smoothing Branch and Instruction Cache Miss Penalties on Deep Pipelines
Models for Communications in the Hypercube
Models, Mindsets, Meta: The What, the How, and Why Not?: Essays Dedicated to Bernhard Steffen on the Occasion of His 60th Birthday
MT: A Multithreaded 64 Bits RISC CPU
Multicore Software Engineering, Performance, and Tools: Proc./ International Conference, MSEPT 2012, Prague, Czech Republic, May/June 2012
Multiple Threads in Cyclic Register Windows
Multiscattering on a reconfigurable network of processors
Network and Parallel Computing: Proc./10th IFIP International Conference, NPC 2013, Guiyang, China, September 2013
Network and Parallel Computing: Proc./15th IFIP WG 10.3 International Conference, NPC 2018, Muroran, Japan, November 2018
Network and Parallel Computing: Proc./9th IFIP International Conference, NPC 2012, Gwangju, Korea, September 2012
Network and Parallel Computing: Revised Selected Papers/17th IFIP WG 10.3 International Conference, NPC 2020, Zhengzhou, China, September 2020
Novell PerfectOffice 3.0
Odd Memory Systems may be quite interesting
On Efficient Embeddings of Grids into Grids in PARIX
On Embedding Interconnection Networks into Rings of Processors
On-line Error Detection and Fast Recover Techniques for Dependable Embedded Processors
On Optimal Processor Allocation to Support Pipelined Hash Joins
On Parallelizing the Multiprocessor Scheduling Problem
OpenMP in Heterogeneous World: Proc./8th International Workshop on OpenMP, IWOMP 2012, Rome, Italy, June 2012
OpenMP in the Petascale Era: Proc./7th International Workshop on OpenMP, IWOMP 2011, Chicago,Il,USA, June 2011
Optimal Software Pipelining in Preserve of Resource Constraints