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Связанные издания:

A 400 MFLOPS FFT Processor VLSI Architecture
A 5 ns Embedded RAM for CMOS ASICs and Its Applications to a One-Chip 4096-Channel Time Switch VLSI for Digital Switching Systems
A Component Model for Synchronous VLSI System Design
A Heuristic Inductive Generalization Method and its Application to VLSI-Design
A Master Chip Design of 0.5mm Mixed BiCMOS/CMOS Channelless Gate Array Family
An Area-Efficient Topology for VLSI Implementation of Viterbi Decoders and other Shuffle-Exchange Type Structures
An Effictive Reconfiguration Process for Fault-Tolerant VLSI/WSI Array Processors
An Integrated Approach to the Floorplanning, Placement and Routing of Hierarchical Designs
An Intelliigent Cache Memory Chip Suitable for Logical InferOn "inherently context-sensitive" languages - An application
An Optimal Worst-Case Algorithm for Reporting Intersections of Rectangles
A Note on Lower Bound for One-Dimensional Systolic Array
Application of Constraint Logic Programming for VLSI CAD Tools
Architecture of a Floating-Point Butterfly Execution Unit in a 400-MFLOPS Processor VLSI and Its Implementation
Architectures for Parallel Slicing Enumeration in VLSI Layout
A Special Purpose Architecture for Real-Time SAR Data Processing
Asynchronous Logic Techniques for Data-Rate Matching and Area-Time Reduction
Basic VLSI Design: Systems and Circuits. Second Edition
Branching Programs versus Oblivious Branching Programs
Built-In Seltt-Test in a 24 Bit Floatiog Point Digital Signal Processor
Channel Routing of Multiterminal Nets
Chapter 2. Circuit Design in Ruby
Codes to Reduce Switching Transients Across VLSI I/O Pins
Comparison of two VLSI Models
Data Structure and Algorithms for New Hardware Technology
Data Structures for the Rectangle Containment and Enclosure Problems
DDB: An Object Oriented Design Data Manager for VLSI CAD
Design of a Matrix Multiply-Addition VLSI Processor for Robot Inverse Dynamics Computation
Design Synthesis and Silicon Compilation
Dielectric Materials for Advanced VLSI and ULSI Technologies
Die "Neue Mikroelektronik" in der Informatik: Voraussetzungen und Auswirkungen
Ein Modell zur entwurfsbegleitenden hierarchischen Behandlung des Zeitverhaltens beim physikalischen VLSI-Entwurf
Embedded Computer Systems: Architectures, Modeling, and Simulation: Proc./9th International Workshop, SAMOS 2009. Samos, Greece, July 2009
Hierarchical Test Analysis of VLSI Circuits for Random BIST
High-Performance Computing on a Honeycomb Architecture
IMS T424 Transputer Reference Manual
Innovative Schaltunstechnik statt Software- SHUFFLE SORT: VLSI-Beispiel eines Sortierers
KARL: A Hardware Description Language as Part of a CAD Toll for VLSI
Linking Higher Order Logic to a VLSI CAD System
Logical Design of VLSI Circuit with Extension of Uncertainty (or monotonic functional completeness of Kleene ternary logic)
Logic Simulation on the Mars Multicomputer
Multiphase Multirate Arrays
Neural Network-based Decision Making for Large Incomplete Databases
On a graph partition problem with application to VLSI layout
On the Power of Multiple Reads in a Chip
Optimal Worst-Case Algorithms for Rectangle Intersection and Batched Range Searching Problems
Parallel Logic Simulation of VLSI Systems
PEST: a Tool for Implementing Pseudo-Exhaustive Self-Test
Practical Dictionary Management for Hardware Data Compression
Problems of technology migration for VLSI Layout
Prototyping of VLSI Components from a Formal Specification